SDK  23.9.2
For IoT System Software Development
Classes | Public Types | Public Member Functions | Static Public Attributes | Protected Types | Protected Member Functions | Protected Attributes | List of all members
SX1301Chip Class Reference

저전력 multi-band LoRaTM 및 FSK 무선 통신을 지원하는 Semtech의 SX1301 radio concentrator 을 지원합니다. More...

#include <SX1301Chip.hpp>

Inheritance diagram for SX1301Chip:
PacketRadioChip

Public Types

enum  Radio_t { RADIO_TYPE_NONE = 0, RADIO_TYPE_SX1255 = 1, RADIO_TYPE_SX1257 = 2 }
 
enum  {
  NUM_RF_CHAIN = 2, NUM_IF_CHAIN = 10, NUM_TX_GAIN = 16, IF_INDEX_LORA_STANDALONE = 8,
  IF_INDEX_FSK_STANDALONE = 9
}
 
enum  {
  BW_UNDEFINED = 0, BW_500kHz = 1, BW_250kHz = 2, BW_125kHz = 3,
  BW_62_5kHz = 4, BW_31_2kHz = 5, BW_15_6kHz = 6, BW_7_8kHz = 7
}
 
enum  {
  DR_UNDEFINED = 0, DR_LORA_SF7 = (1 << 1), DR_LORA_SF8 = (1 << 2), DR_LORA_SF9 = (1 << 3),
  DR_LORA_SF10 = (1 << 4), DR_LORA_SF11 = (1 << 5), DR_LORA_SF12 = (1 << 6), DR_LORA_MULTI = 0x7E,
  DR_FSK_MIN = 500, DR_FSK_MAX = 250000
}
 
enum  { ERROR_IF_FREQ_TOO_HIGH = -100, ERROR_IF_FREQ_TOO_LOW = -101, ERROR_IF_BANDWIDTH_NOT_SUPPORTED = -102, ERROR_IF_DATARATE_NOT_SUPPORTED = -103 }
 
enum  { ERROR_TX_GAIN_DIG = -100, ERROR_TX_GAIN_DAC = -101, ERROR_TX_GAIN_MIX = -102, ERROR_TX_GAIN_PA = -103 }
 
enum  { MCU_AGC_FW_BYTE = 8192, MCU_ARB_FW_BYTE = 8192 }
 

Public Member Functions

 SX1301Chip (SPI &s, int8_t pinCsn, int8_t pinReset, uint8_t clockSource)
 
error_t setSyncword (uint8_t value)
 Syncword를 설정합니다. More...
 
error_t setDataRate (Radio::LoRaSF_t sf)
 기본으로 사용할 LoRa spreading factor (SF)를 설정합니다. More...
 
error_t setCodingRate (Radio::LoRaCR_t cr)
 기본으로 사용할 LoRa coding rate (CR)를 설정합니다. More...
 
error_t setBandwidth (Radio::LoRaBW_t bw)
 기본으로 사용할 LoRa bandwidth (BW)를 설정합니다. More...
 
error_t configureRf (uint8_t index, bool enable, bool txEnable, uint32_t freqHz, float rssiOffset=-166.0, Radio_t type=RADIO_TYPE_SX1257, uint32_t txNotchFreqHz=0)
 RF interface를 설정합니다. More...
 
error_t configureRxIf (uint8_t index, uint8_t rfChainIndex, bool enable, int32_t rFreqHz, uint8_t bandwidth=BW_UNDEFINED, uint32_t datarate=DR_UNDEFINED, uint8_t fskSyncwordSize=3, uint64_t fskSyncword=0xC194C1)
 Rx interface를 설정합니다. More...
 
uint32_t getChannel (uint8_t index)
 Rx interface 별 설정된 주파수를 가져옵니다. More...
 
error_t configureTxGain (uint8_t index, uint8_t digGain, uint8_t paGain, uint8_t dacGain, uint8_t mixGain, int8_t dBm)
 Tx Gain look up table을 설정합니다. More...
 
error_t begin ()
 SX1301 의 동작을 시작합니다.
 
void end ()
 SX1301 의 동작을 종료합니다.
 
error_t readFrame (RadioPacket *pkt)
 수신 버퍼에서 프레임을 읽습니다. More...
 
bool bufferIsEmpty ()
 
void flushBuffer ()
 
void sleep ()
 
void wakeup ()
 
error_t transmit (RadioPacket *pkt)
 
error_t transmit (RadioPacket *frame, uint64_t txTimestamp)
 
bool cca () override
 채널이 혼잡한지 아닌지 검사합니다. More...
 
void setTxPower (int8_t dBm)
 송신 출력을 설정합니다. More...
 
int8_t getTxPower ()
 현재 설정된 송신 출력을 반환합니다. More...
 
void setChannel (uint32_t channel)
 채널을 설정합니다.
 
uint32_t getChannel ()
 현재 설정된 채널을 반환합니다.
 
- Public Member Functions inherited from PacketRadioChip
void setCcaThreshold (int16_t dBthreshold)
 

Static Public Attributes

static const uint8_t firmwareAgc [MCU_AGC_FW_BYTE]
 
static const uint8_t firmwareArb [MCU_ARB_FW_BYTE]
 
static const uint8_t firmwareCal [MCU_AGC_FW_BYTE]
 

Protected Types

enum  TxStatus_t { STATE_TX_OFF = 0, STATE_TX_FREE = 1, STATE_TX_EMITTING = 2, STATE_TX_SCHEDULED = 3 }
 
enum  {
  REG_PAGE_REG = 0, REG_SOFT_RESET = 1, REG_VERSION = 2, REG_RX_DATA_BUF_ADDR = 3,
  REG_RX_DATA_BUF_DATA = 4, REG_TX_DATA_BUF_ADDR = 5, REG_TX_DATA_BUF_DATA = 6, REG_CAPTURE_RAM_ADDR = 7,
  REG_CAPTURE_RAM_DATA = 8, REG_MCU_PROM_ADDR = 9, REG_MCU_PROM_DATA = 10, REG_RX_PACKET_DATA_FIFO_NUM_STORED = 11,
  REG_RX_PACKET_DATA_FIFO_ADDR_POINTER = 12, REG_RX_PACKET_DATA_FIFO_STATUS = 13, REG_RX_PACKET_DATA_FIFO_PAYLOAD_SIZE = 14, REG_MBWSSF_MODEM_ENABLE = 15,
  REG_CONCENTRATOR_MODEM_ENABLE = 16, REG_FSK_MODEM_ENABLE = 17, REG_GLOBAL_EN = 18, REG_CLK32M_EN = 19,
  REG_CLKHS_EN = 20, REG_START_BIST0 = 21, REG_START_BIST1 = 22, REG_CLEAR_BIST0 = 23,
  REG_CLEAR_BIST1 = 24, REG_BIST0_FINISHED = 25, REG_BIST1_FINISHED = 26, REG_MCU_AGC_PROG_RAM_BIST_STATUS = 27,
  REG_MCU_ARB_PROG_RAM_BIST_STATUS = 28, REG_CAPTURE_RAM_BIST_STATUS = 29, REG_CHAN_FIR_RAM0_BIST_STATUS = 30, REG_CHAN_FIR_RAM1_BIST_STATUS = 31,
  REG_CORR0_RAM_BIST_STATUS = 32, REG_CORR1_RAM_BIST_STATUS = 33, REG_CORR2_RAM_BIST_STATUS = 34, REG_CORR3_RAM_BIST_STATUS = 35,
  REG_CORR4_RAM_BIST_STATUS = 36, REG_CORR5_RAM_BIST_STATUS = 37, REG_CORR6_RAM_BIST_STATUS = 38, REG_CORR7_RAM_BIST_STATUS = 39,
  REG_MODEM0_RAM0_BIST_STATUS = 40, REG_MODEM1_RAM0_BIST_STATUS = 41, REG_MODEM2_RAM0_BIST_STATUS = 42, REG_MODEM3_RAM0_BIST_STATUS = 43,
  REG_MODEM4_RAM0_BIST_STATUS = 44, REG_MODEM5_RAM0_BIST_STATUS = 45, REG_MODEM6_RAM0_BIST_STATUS = 46, REG_MODEM7_RAM0_BIST_STATUS = 47,
  REG_MODEM0_RAM1_BIST_STATUS = 48, REG_MODEM1_RAM1_BIST_STATUS = 49, REG_MODEM2_RAM1_BIST_STATUS = 50, REG_MODEM3_RAM1_BIST_STATUS = 51,
  REG_MODEM4_RAM1_BIST_STATUS = 52, REG_MODEM5_RAM1_BIST_STATUS = 53, REG_MODEM6_RAM1_BIST_STATUS = 54, REG_MODEM7_RAM1_BIST_STATUS = 55,
  REG_MODEM0_RAM2_BIST_STATUS = 56, REG_MODEM1_RAM2_BIST_STATUS = 57, REG_MODEM2_RAM2_BIST_STATUS = 58, REG_MODEM3_RAM2_BIST_STATUS = 59,
  REG_MODEM4_RAM2_BIST_STATUS = 60, REG_MODEM5_RAM2_BIST_STATUS = 61, REG_MODEM6_RAM2_BIST_STATUS = 62, REG_MODEM7_RAM2_BIST_STATUS = 63,
  REG_MODEM_MBWSSF_RAM0_BIST_STATUS = 64, REG_MODEM_MBWSSF_RAM1_BIST_STATUS = 65, REG_MODEM_MBWSSF_RAM2_BIST_STATUS = 66, REG_MCU_AGC_DATA_RAM_BIST0_STATUS = 67,
  REG_MCU_AGC_DATA_RAM_BIST1_STATUS = 68, REG_MCU_ARB_DATA_RAM_BIST0_STATUS = 69, REG_MCU_ARB_DATA_RAM_BIST1_STATUS = 70, REG_TX_TOP_RAM_BIST0_STATUS = 71,
  REG_TX_TOP_RAM_BIST1_STATUS = 72, REG_DATA_MNGT_RAM_BIST0_STATUS = 73, REG_DATA_MNGT_RAM_BIST1_STATUS = 74, REG_GPIO_SELECT_INPUT = 75,
  REG_GPIO_SELECT_OUTPUT = 76, REG_GPIO_MODE = 77, REG_GPIO_PIN_REG_IN = 78, REG_GPIO_PIN_REG_OUT = 79,
  REG_MCU_AGC_STATUS = 80, REG_MCU_ARB_STATUS = 81, REG_CHIP_ID = 82, REG_EMERGENCY_FORCE_HOST_CTRL = 83,
  REG_RX_INVERT_IQ = 84, REG_MODEM_INVERT_IQ = 85, REG_MBWSSF_MODEM_INVERT_IQ = 86, REG_RX_EDGE_SELECT = 87,
  REG_MISC_RADIO_EN = 88, REG_FSK_MODEM_INVERT_IQ = 89, REG_FILTER_GAIN = 90, REG_RADIO_SELECT = 91,
  REG_IF_FREQ_0 = 92, REG_IF_FREQ_1 = 93, REG_IF_FREQ_2 = 94, REG_IF_FREQ_3 = 95,
  REG_IF_FREQ_4 = 96, REG_IF_FREQ_5 = 97, REG_IF_FREQ_6 = 98, REG_IF_FREQ_7 = 99,
  REG_IF_FREQ_8 = 100, REG_IF_FREQ_9 = 101, REG_CHANN_OVERRIDE_AGC_GAIN = 102, REG_CHANN_AGC_GAIN = 103,
  REG_CORR0_DETECT_EN = 104, REG_CORR1_DETECT_EN = 105, REG_CORR2_DETECT_EN = 106, REG_CORR3_DETECT_EN = 107,
  REG_CORR4_DETECT_EN = 108, REG_CORR5_DETECT_EN = 109, REG_CORR6_DETECT_EN = 110, REG_CORR7_DETECT_EN = 111,
  REG_CORR_SAME_PEAKS_OPTION_SF6 = 112, REG_CORR_SAME_PEAKS_OPTION_SF7 = 113, REG_CORR_SAME_PEAKS_OPTION_SF8 = 114, REG_CORR_SAME_PEAKS_OPTION_SF9 = 115,
  REG_CORR_SAME_PEAKS_OPTION_SF10 = 116, REG_CORR_SAME_PEAKS_OPTION_SF11 = 117, REG_CORR_SAME_PEAKS_OPTION_SF12 = 118, REG_CORR_SIG_NOISE_RATIO_SF6 = 119,
  REG_CORR_SIG_NOISE_RATIO_SF7 = 120, REG_CORR_SIG_NOISE_RATIO_SF8 = 121, REG_CORR_SIG_NOISE_RATIO_SF9 = 122, REG_CORR_SIG_NOISE_RATIO_SF10 = 123,
  REG_CORR_SIG_NOISE_RATIO_SF11 = 124, REG_CORR_SIG_NOISE_RATIO_SF12 = 125, REG_CORR_NUM_SAME_PEAK = 126, REG_CORR_MAC_GAIN = 127,
  REG_ADJUST_MODEM_START_OFFSET_RDX4 = 128, REG_ADJUST_MODEM_START_OFFSET_SF12_RDX4 = 129, REG_DBG_CORR_SELECT_SF = 130, REG_DBG_CORR_SELECT_CHANNEL = 131,
  REG_DBG_DETECT_CPT = 132, REG_DBG_SYMB_CPT = 133, REG_CHIRP_INVERT_RX = 134, REG_DC_NOTCH_EN = 135,
  REG_IMPLICIT_CRC_EN = 136, REG_IMPLICIT_CODING_RATE = 137, REG_IMPLICIT_PAYLOAD_LENGHT = 138, REG_FREQ_TO_TIME_INVERT = 139,
  REG_FREQ_TO_TIME_DRIFT = 140, REG_PAYLOAD_FINE_TIMING_GAIN = 141, REG_PREAMBLE_FINE_TIMING_GAIN = 142, REG_TRACKING_INTEGRAL = 143,
  REG_FRAME_SYNCH_PEAK1_POS = 144, REG_FRAME_SYNCH_PEAK2_POS = 145, REG_PREAMBLE_SYMB1_NB = 146, REG_FRAME_SYNCH_GAIN = 147,
  REG_SYNCH_DETECT_TH = 148, REG_LLR_SCALE = 149, REG_SNR_AVG_CST = 150, REG_PPM_OFFSET = 151,
  REG_MAX_PAYLOAD_LEN = 152, REG_ONLY_CRC_EN = 153, REG_ZERO_PAD = 154, REG_DEC_GAIN_OFFSET = 155,
  REG_CHAN_GAIN_OFFSET = 156, REG_FORCE_HOST_RADIO_CTRL = 157, REG_FORCE_HOST_FE_CTRL = 158, REG_FORCE_DEC_FILTER_GAIN = 159,
  REG_MCU_RST_0 = 160, REG_MCU_RST_1 = 161, REG_MCU_SELECT_MUX_0 = 162, REG_MCU_SELECT_MUX_1 = 163,
  REG_MCU_CORRUPTION_DETECTED_0 = 164, REG_MCU_CORRUPTION_DETECTED_1 = 165, REG_MCU_SELECT_EDGE_0 = 166, REG_MCU_SELECT_EDGE_1 = 167,
  REG_CHANN_SELECT_RSSI = 168, REG_RSSI_BB_DEFAULT_VALUE = 169, REG_RSSI_DEC_DEFAULT_VALUE = 170, REG_RSSI_CHANN_DEFAULT_VALUE = 171,
  REG_RSSI_BB_FILTER_ALPHA = 172, REG_RSSI_DEC_FILTER_ALPHA = 173, REG_RSSI_CHANN_FILTER_ALPHA = 174, REG_IQ_MISMATCH_A_AMP_COEFF = 175,
  REG_IQ_MISMATCH_A_PHI_COEFF = 176, REG_IQ_MISMATCH_B_AMP_COEFF = 177, REG_IQ_MISMATCH_B_SEL_I = 178, REG_IQ_MISMATCH_B_PHI_COEFF = 179,
  REG_TX_TRIG_IMMEDIATE = 180, REG_TX_TRIG_DELAYED = 181, REG_TX_TRIG_GPS = 182, REG_TX_START_DELAY = 183,
  REG_TX_FRAME_SYNCH_PEAK1_POS = 184, REG_TX_FRAME_SYNCH_PEAK2_POS = 185, REG_TX_RAMP_DURATION = 186, REG_TX_OFFSET_I = 187,
  REG_TX_OFFSET_Q = 188, REG_TX_MODE = 189, REG_TX_ZERO_PAD = 190, REG_TX_EDGE_SELECT = 191,
  REG_TX_EDGE_SELECT_TOP = 192, REG_TX_GAIN = 193, REG_TX_CHIRP_LOW_PASS = 194, REG_TX_FCC_WIDEBAND = 195,
  REG_TX_SWAP_IQ = 196, REG_MBWSSF_IMPLICIT_HEADER = 197, REG_MBWSSF_IMPLICIT_CRC_EN = 198, REG_MBWSSF_IMPLICIT_CODING_RATE = 199,
  REG_MBWSSF_IMPLICIT_PAYLOAD_LENGHT = 200, REG_MBWSSF_AGC_FREEZE_ON_DETECT = 201, REG_MBWSSF_FRAME_SYNCH_PEAK1_POS = 202, REG_MBWSSF_FRAME_SYNCH_PEAK2_POS = 203,
  REG_MBWSSF_PREAMBLE_SYMB1_NB = 204, REG_MBWSSF_FRAME_SYNCH_GAIN = 205, REG_MBWSSF_SYNCH_DETECT_TH = 206, REG_MBWSSF_DETECT_MIN_SINGLE_PEAK = 207,
  REG_MBWSSF_DETECT_TRIG_SAME_PEAK_NB = 208, REG_MBWSSF_FREQ_TO_TIME_INVERT = 209, REG_MBWSSF_FREQ_TO_TIME_DRIFT = 210, REG_MBWSSF_PPM_CORRECTION = 211,
  REG_MBWSSF_PAYLOAD_FINE_TIMING_GAIN = 212, REG_MBWSSF_PREAMBLE_FINE_TIMING_GAIN = 213, REG_MBWSSF_TRACKING_INTEGRAL = 214, REG_MBWSSF_ZERO_PAD = 215,
  REG_MBWSSF_MODEM_BW = 216, REG_MBWSSF_RADIO_SELECT = 217, REG_MBWSSF_RX_CHIRP_INVERT = 218, REG_MBWSSF_LLR_SCALE = 219,
  REG_MBWSSF_SNR_AVG_CST = 220, REG_MBWSSF_PPM_OFFSET = 221, REG_MBWSSF_RATE_SF = 222, REG_MBWSSF_ONLY_CRC_EN = 223,
  REG_MBWSSF_MAX_PAYLOAD_LEN = 224, REG_TX_STATUS = 225, REG_FSK_CH_BW_EXPO = 226, REG_FSK_RSSI_LENGTH = 227,
  REG_FSK_RX_INVERT = 228, REG_FSK_PKT_MODE = 229, REG_FSK_PSIZE = 230, REG_FSK_CRC_EN = 231,
  REG_FSK_DCFREE_ENC = 232, REG_FSK_CRC_IBM = 233, REG_FSK_ERROR_OSR_TOL = 234, REG_FSK_RADIO_SELECT = 235,
  REG_FSK_BR_RATIO = 236, REG_FSK_REF_PATTERN_LSB = 237, REG_FSK_REF_PATTERN_MSB = 238, REG_FSK_PKT_LENGTH = 239,
  REG_FSK_TX_GAUSSIAN_EN = 240, REG_FSK_TX_GAUSSIAN_SELECT_BT = 241, REG_FSK_TX_PATTERN_EN = 242, REG_FSK_TX_PREAMBLE_SEQ = 243,
  REG_FSK_TX_PSIZE = 244, REG_FSK_NODE_ADRS = 245, REG_FSK_BROADCAST = 246, REG_FSK_AUTO_AFC_ON = 247,
  REG_FSK_PATTERN_TIMEOUT_CFG = 248, REG_SPI_RADIO_A__DATA = 249, REG_SPI_RADIO_A__DATA_READBACK = 250, REG_SPI_RADIO_A__ADDR = 251,
  REG_SPI_RADIO_A__CS = 252, REG_SPI_RADIO_B__DATA = 253, REG_SPI_RADIO_B__DATA_READBACK = 254, REG_SPI_RADIO_B__ADDR = 255,
  REG_SPI_RADIO_B__CS = 256, REG_RADIO_A_EN = 257, REG_RADIO_B_EN = 258, REG_RADIO_RST = 259,
  REG_LNA_A_EN = 260, REG_PA_A_EN = 261, REG_LNA_B_EN = 262, REG_PA_B_EN = 263,
  REG_PA_GAIN = 264, REG_LNA_A_CTRL_LUT = 265, REG_PA_A_CTRL_LUT = 266, REG_LNA_B_CTRL_LUT = 267,
  REG_PA_B_CTRL_LUT = 268, REG_CAPTURE_SOURCE = 269, REG_CAPTURE_START = 270, REG_CAPTURE_FORCE_TRIGGER = 271,
  REG_CAPTURE_WRAP = 272, REG_CAPTURE_PERIOD = 273, REG_MODEM_STATUS = 274, REG_VALID_HEADER_COUNTER_0 = 275,
  REG_VALID_PACKET_COUNTER_0 = 276, REG_VALID_HEADER_COUNTER_MBWSSF = 277, REG_VALID_HEADER_COUNTER_FSK = 278, REG_VALID_PACKET_COUNTER_MBWSSF = 279,
  REG_VALID_PACKET_COUNTER_FSK = 280, REG_CHANN_RSSI = 281, REG_BB_RSSI = 282, REG_DEC_RSSI = 283,
  REG_DBG_MCU_DATA = 284, REG_DBG_ARB_MCU_RAM_DATA = 285, REG_DBG_AGC_MCU_RAM_DATA = 286, REG_NEXT_PACKET_CNT = 287,
  REG_ADDR_CAPTURE_COUNT = 288, REG_TIMESTAMP = 289, REG_DBG_CHANN0_GAIN = 290, REG_DBG_CHANN1_GAIN = 291,
  REG_DBG_CHANN2_GAIN = 292, REG_DBG_CHANN3_GAIN = 293, REG_DBG_CHANN4_GAIN = 294, REG_DBG_CHANN5_GAIN = 295,
  REG_DBG_CHANN6_GAIN = 296, REG_DBG_CHANN7_GAIN = 297, REG_DBG_DEC_FILT_GAIN = 298, REG_SPI_DATA_FIFO_PTR = 299,
  REG_PACKET_DATA_FIFO_PTR = 300, REG_DBG_ARB_MCU_RAM_ADDR = 301, REG_DBG_AGC_MCU_RAM_ADDR = 302, REG_SPI_MASTER_CHIP_SELECT_POLARITY = 303,
  REG_SPI_MASTER_CPOL = 304, REG_SPI_MASTER_CPHA = 305, REG_SIG_GEN_ANALYSER_MUX_SEL = 306, REG_SIG_GEN_EN = 307,
  REG_SIG_ANALYSER_EN = 308, REG_SIG_ANALYSER_AVG_LEN = 309, REG_SIG_ANALYSER_PRECISION = 310, REG_SIG_ANALYSER_VALID_OUT = 311,
  REG_SIG_GEN_FREQ = 312, REG_SIG_ANALYSER_FREQ = 313, REG_SIG_ANALYSER_I_OUT = 314, REG_SIG_ANALYSER_Q_OUT = 315,
  REG_GPS_EN = 316, REG_GPS_POL = 317, REG_SW_TEST_REG1 =318, REG_SW_TEST_REG2 = 319,
  REG_SW_TEST_REG3 = 320, REG_DATA_MNGT_STATUS = 321, REG_DATA_MNGT_CPT_FRAME_ALLOCATED = 322, REG_DATA_MNGT_CPT_FRAME_FINISHED = 323,
  REG_DATA_MNGT_CPT_FRAME_READEN = 324, REG_TX_TRIG_ALL = 325, NUM_TOTAL_REGS = 326
}
 

Protected Member Functions

void doIO ()
 
void beginTransaction ()
 
void endTransaction ()
 
virtual void regWrite (uint16_t reg, int32_t val)
 
virtual void regWriteBurst (uint16_t reg, const uint8_t *data, uint16_t size)
 
virtual int32_t regRead (uint16_t reg)
 
virtual void regReadBurst (uint16_t reg, uint8_t *data, uint16_t size)
 
void switchPage (uint8_t page)
 
virtual TxStatus_t getTxStatus ()
 

Protected Attributes

SPIspi
 
int8_t pinCsn
 
int8_t pinReset
 
int8_t regpage
 
RadioPackettxFrameToSend
 
RadioPackettxFrameSent
 
uint8_t lastRxData [255+16]
 
uint8_t lastRxDataLen
 
struct {
   bool   enabled:1
 
   bool   txEnabled:1
 
   uint32_t   freqHz
 
   float   rssiOffset
 
   uint32_t   txNotchFreqHz
 
   Radio_t   type
 
rfChain [NUM_RF_CHAIN]
 
struct {
   bool   enabled
 
   uint8_t   rfChain
 
   int32_t   rFreqHz
 
   union {
      struct {
         uint8_t   sfMask
 
      }   loraMulti
 
      struct {
         uint8_t   bw
 
         uint8_t   sf
 
         bool   rxPpmOffset
 
      }   loraStandalone
 
      struct {
         uint8_t   bw
 
         uint32_t   dr
 
         uint8_t   syncwordSize
 
         uint64_t   syncword
 
      }   fskStandalone
 
   }   conf
 
ifChain [NUM_IF_CHAIN]
 
int8_t calOffsetAI [8]
 
int8_t calOffsetAQ [8]
 
int8_t calOffsetBI [8]
 
int8_t calOffsetBQ [8]
 

Additional Inherited Members

- Public Attributes inherited from PacketRadioChip
void(* onRxStarted )(void *, GPIOInterruptInfo_t *)
 수신이 시작될 때 호출될 콜백함수 포인터 More...
 
void * ctxOnRxStarted
 onRxStarted 가 호출될 때 함께 전달될 context
 
void(* onRxDone )(void *, GPIOInterruptInfo_t *)
 수신이 완료될 때 호출될 콜백함수 포인터 More...
 
void * ctxOnRxDone
 onRxDone 이 호출될 때 함께 전달될 context
 
void(* onTxDone )(void *, bool, GPIOInterruptInfo_t *)
 transmit() 후, 송신이 완료될 때 호출될 콜백함수 포인터 More...
 
void * ctxOnTxDone
 onTxDone 이 호출될 때 함께 전달될 context
 
void(* onChannelBusy )(void *, GPIOInterruptInfo_t *)
 cca() 시 채널이 혼잡할 때 호출될 콜백함수 포인터 More...
 
void * ctxOnChannelBusy
 onChannelBusy 가 호출될 때 함께 전달될 context
 
int16_t dBccaThreshold = -65
 cca() 시 채널이 혼잡하다고 판단하기 위한 에너지 레벨을 설정합니다. (단위: dB, 기본값: -65)
 

Detailed Description

저전력 multi-band LoRaTM 및 FSK 무선 통신을 지원하는 Semtech의 SX1301 radio concentrator 을 지원합니다.

Rx

SX1301에서는 8개의 multi datarate LoRaTM interface, 1개의 LoRaTM standalone interface, 그리고 1개의 FSK standalone interface 를 지원합니다. 이를 설정하기 위해서는 SX1301Chip::configureRf(), 및 SX1301Chip::configureRxIf() 를 사용합니다.

위 예제는 SX1301에 SX1257 2개가 연결된 하드웨어 구성에서 사용할 수 있으며, 다음과 같이 수신 설정이 됩니다.

Interface # Interface Type Listening frequency Rx bandwidth
0 Multi datarate LoRaTM interface 921.9 MHz 125 kHz
1 Multi datarate LoRaTM interface 922.1 MHz 125 kHz
2 Multi datarate LoRaTM interface 922.3 MHz 125 kHz
3 Multi datarate LoRaTM interface 922.5 MHz 125 kHz
4 Multi datarate LoRaTM interface 922.7 MHz 125 kHz
5 Multi datarate LoRaTM interface 922.9 MHz 125 kHz
6 Multi datarate LoRaTM interface 923.1 MHz 125 kHz
7 Multi datarate LoRaTM interface 923.3 MHz 125 kHz
8 LoRaTM standalone interface 923.3 MHz 250 kHz
9 FSK standalone interface 921.7 MHz 250 kHz

패킷 수신시, PacketRadioChip::onRxDone() 에서 지정한 콜백함수가 호출됩니다. 콜백함수에서 PacketRadioChip::readFrame() 을 통해 수신한 패킷을 읽을 수 있습니다.

Tx

SX1301에서 패킷을 송신하기 위해서는 PacketRadioChip::transmit() 을 이용하되, 인자 RadioPacket 에 modulation 등 원하는 파라미터를 설정해야 합니다.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
Enumerator
NUM_RF_CHAIN 

Number of RF interfaces

NUM_IF_CHAIN 

Number of Rx interfaces

NUM_TX_GAIN 

Size of Tx lookup table

IF_INDEX_LORA_STANDALONE 

LoRa standalone interface

IF_INDEX_FSK_STANDALONE 

FSK standalone interface

229  {
230  NUM_RF_CHAIN = 2,
231  NUM_IF_CHAIN = 10,
232  NUM_TX_GAIN = 16,
235  };

◆ anonymous enum

anonymous enum
Enumerator
ERROR_IF_FREQ_TOO_HIGH 

주파수가 너무 높음

ERROR_IF_FREQ_TOO_LOW 

주파수가 너무 낮음

ERROR_IF_BANDWIDTH_NOT_SUPPORTED 

미지원 대역폭

ERROR_IF_DATARATE_NOT_SUPPORTED 

미지원 data rate

332  {
333  ERROR_IF_FREQ_TOO_HIGH = -100,
334  ERROR_IF_FREQ_TOO_LOW = -101,
337  };

◆ anonymous enum

anonymous enum
Enumerator
ERROR_TX_GAIN_DIG 

Digital gain 설정 오류

ERROR_TX_GAIN_DAC 

DAC gain 설정 오류

ERROR_TX_GAIN_MIX 

Mixer gain 설정 오류

ERROR_TX_GAIN_PA 

PA gain 설정 오류

375  {
376  ERROR_TX_GAIN_DIG = -100,
377  ERROR_TX_GAIN_DAC = -101,
378  ERROR_TX_GAIN_MIX = -102,
379  ERROR_TX_GAIN_PA = -103,
380  };

◆ Radio_t

Enumerator
RADIO_TYPE_SX1255 

SX1255

RADIO_TYPE_SX1257 

SX1257

223  {
224  RADIO_TYPE_NONE = 0,
225  RADIO_TYPE_SX1255 = 1,
226  RADIO_TYPE_SX1257 = 2,
227  } Radio_t;

Member Function Documentation

◆ cca()

bool SX1301Chip::cca ( )
overridevirtual

채널이 혼잡한지 아닌지 검사합니다.

채널이 혼잡하다고 감지되는 순간, onChannelBusy 가 가리키는 콜백함수가 호출됩니다.

Implements PacketRadioChip.

◆ configureRf()

error_t SX1301Chip::configureRf ( uint8_t  index,
bool  enable,
bool  txEnable,
uint32_t  freqHz,
float  rssiOffset = -166.0,
Radio_t  type = RADIO_TYPE_SX1257,
uint32_t  txNotchFreqHz = 0 
)

RF interface를 설정합니다.

Parameters
indexRF interface의 index (0~1)
enableRF interface의 활성화 여부
txEnableRF interface에서의 Tx 활성화 여부
freqHzRF interface에 설정할 중심 주파수 (단위: Hz)
rssiOffsetRSSI 교정 offset (기본 값: -166)
typeRF chain의 타입 (기본 값: SX1301Chip::RADIO_TYPE_SX1257)
txNotchFreqHzTx notch filter frequency (126kHz ~ 250kHz) for SX1301AP2 (FPGA)
Returns
  • ERROR_SUCCESS : 설정 성공.
  • ERROR_FAIL : 칩이 이미 시작되어 설정할 수 없음
  • ERROR_INVALID_ARGS : index, type 등 파라미터가 유효하지 않음

◆ configureRxIf()

error_t SX1301Chip::configureRxIf ( uint8_t  index,
uint8_t  rfChainIndex,
bool  enable,
int32_t  rFreqHz,
uint8_t  bandwidth = BW_UNDEFINED,
uint32_t  datarate = DR_UNDEFINED,
uint8_t  fskSyncwordSize = 3,
uint64_t  fskSyncword = 0xC194C1 
)

Rx interface를 설정합니다.

Parameters
indexIF chain의 index (0~7: multi LoRa, 8: SX1301Chip::IF_INDEX_LORA_STANDALONE, 9: SX1301Chip::IF_INDEX_FSK_STANDALONE)
rfChainIndex사용할 RF chain의 index
enableIF chain의 활성화 여부
rFreqHz수신 대기할 주파수. RF chain의 중심 주파수 기준의 상대 주파수
bandwidth수신 대기할 bandwidth. Default는 SX1301Chip::BW_UNDEFINED 이며, LoRa interface 에서는 125kHz, FSK standalone interface 에서는 250kHz로 설정됩니다.
datarate수신 대기할 datarate. Multi channel LoRa interface 에서는 SF7으로 고정되고, LoRa standalone interface 에서는 SX1301Chip::DR_LORA_SF7 ~ SX1301Chip::DR_LORA_SF12 사이의 값으로 설정 가능합니다. FSK standalone interface인 경우, 500 ~ 250000 사이의 값이어야 합니다. Default는 SX1301Chip::DR_UNDEFINED 이며, 이는 LoRa standalone interface에서는 SX1301Chip::DR_LORA_SF7, FSK standalone 인 경우, 50000 으로 설정됩니다.
fskSyncwordSizeFSK syncword의 크기 (# of bytes). Default는 3.
fskSyncwordFSK syncword (aligned right, MSBit first). Default는 0xC194C1.
Returns

◆ configureTxGain()

error_t SX1301Chip::configureTxGain ( uint8_t  index,
uint8_t  digGain,
uint8_t  paGain,
uint8_t  dacGain,
uint8_t  mixGain,
int8_t  dBm 
)

Tx Gain look up table을 설정합니다.

Parameters
indexLook up table index (0~15)
digGainDigital gain (2-bits)
paGain외부 PA (2-bits)
dacGainRadio DAC (2-bits)
mixGainRadio mixer (2-bits)
dBm보드 커넥터에서 측정된 Tx power (dBm 단위)
Returns

◆ getChannel()

uint32_t SX1301Chip::getChannel ( uint8_t  index)

Rx interface 별 설정된 주파수를 가져옵니다.

Parameters
indexRx interface의 index (0~9)
Returns
index 가 유효하고, 활성화된 interface 인 경우 주파수. (단위: Hz) 그렇지 않은 경우 0.

◆ getTxPower()

int8_t SX1301Chip::getTxPower ( )
virtual

현재 설정된 송신 출력을 반환합니다.

Returns
송신 출력 (단위: dBm)

Implements PacketRadioChip.

◆ readFrame()

error_t SX1301Chip::readFrame ( RadioPacket frame)
virtual

수신 버퍼에서 프레임을 읽습니다.

Returns
  • ERROR_SUCCESS : 성공
  • ERROR_FAIL : 실패 (수신한 프레임이 없음)
  • ERROR_INVALID_ARGS : frame 이 NULL 이거나, frame 내부 버퍼가 충분히 크지 않아서 실패

Implements PacketRadioChip.

◆ setBandwidth()

error_t SX1301Chip::setBandwidth ( Radio::LoRaBW_t  bw)

기본으로 사용할 LoRa bandwidth (BW)를 설정합니다.

전송할 프레임의 meta.LoRa.bw 에 유효한 Radio::LoRaBW_t 를 지정하지 않으면 이 함수에서 지정한 BW가 사용됩니다.

Parameters
sfLoRa bandwidth
Returns
  • ERROR_SUCCESS : 설정 성공
  • ERROR_FAIL : 설정 실패 (칩이 이미 시작됨)

◆ setCodingRate()

error_t SX1301Chip::setCodingRate ( Radio::LoRaCR_t  cr)

기본으로 사용할 LoRa coding rate (CR)를 설정합니다.

전송할 프레임의 meta.LoRa.cr 에 유효한 Radio::LoRaCR_t 를 지정하지 않으면 이 함수에서 지정한 CR가 사용됩니다.

Parameters
sfLoRa coding rate
Returns
  • ERROR_SUCCESS : 설정 성공
  • ERROR_FAIL : 설정 실패 (칩이 이미 시작됨)

◆ setDataRate()

error_t SX1301Chip::setDataRate ( Radio::LoRaSF_t  sf)

기본으로 사용할 LoRa spreading factor (SF)를 설정합니다.

전송할 프레임의 meta.LoRa.sf 에 유효한 Radio::LoRaSF_t 를 지정하지 않으면 이 함수에서 지정한 SF가 사용됩니다.

Parameters
sfLoRa spreading factor
Returns
  • ERROR_SUCCESS : 설정 성공
  • ERROR_FAIL : 설정 실패 (칩이 이미 시작됨)

◆ setSyncword()

error_t SX1301Chip::setSyncword ( uint8_t  value)

Syncword를 설정합니다.

Parameters
valueSyncword (기본: 0x12, LoRaWAN: 0x34)
Returns
  • ERROR_SUCCESS : 설정 성공
  • ERROR_FAIL : 설정 실패 (칩이 이미 시작됨)

◆ setTxPower()

void SX1301Chip::setTxPower ( int8_t  dBm)
virtual

송신 출력을 설정합니다.

Parameters
dBm송신 출력 세기 (단위: dBm)

Implements PacketRadioChip.


The documentation for this class was generated from the following file:
SX1301Chip::RADIO_TYPE_SX1255
@ RADIO_TYPE_SX1255
Definition: SX1301Chip.hpp:225
SX1301Chip::ERROR_IF_FREQ_TOO_HIGH
@ ERROR_IF_FREQ_TOO_HIGH
Definition: SX1301Chip.hpp:333
SX1301Chip::IF_INDEX_FSK_STANDALONE
@ IF_INDEX_FSK_STANDALONE
Definition: SX1301Chip.hpp:234
SX1301Chip::ERROR_IF_FREQ_TOO_LOW
@ ERROR_IF_FREQ_TOO_LOW
Definition: SX1301Chip.hpp:334
SX1301Chip::ERROR_IF_BANDWIDTH_NOT_SUPPORTED
@ ERROR_IF_BANDWIDTH_NOT_SUPPORTED
Definition: SX1301Chip.hpp:335
SX1301Chip::ERROR_TX_GAIN_PA
@ ERROR_TX_GAIN_PA
Definition: SX1301Chip.hpp:379
SX1301Chip::NUM_RF_CHAIN
@ NUM_RF_CHAIN
Definition: SX1301Chip.hpp:230
SX1301Chip::Radio_t
Radio_t
Definition: SX1301Chip.hpp:223
SX1301Chip::ERROR_TX_GAIN_MIX
@ ERROR_TX_GAIN_MIX
Definition: SX1301Chip.hpp:378
SX1301Chip::NUM_IF_CHAIN
@ NUM_IF_CHAIN
Definition: SX1301Chip.hpp:231
SX1301Chip::RADIO_TYPE_SX1257
@ RADIO_TYPE_SX1257
Definition: SX1301Chip.hpp:226
SX1301Chip::IF_INDEX_LORA_STANDALONE
@ IF_INDEX_LORA_STANDALONE
Definition: SX1301Chip.hpp:233
SX1301Chip::ERROR_TX_GAIN_DIG
@ ERROR_TX_GAIN_DIG
Definition: SX1301Chip.hpp:376
SX1301Chip::ERROR_IF_DATARATE_NOT_SUPPORTED
@ ERROR_IF_DATARATE_NOT_SUPPORTED
Definition: SX1301Chip.hpp:336
SX1301Chip::NUM_TX_GAIN
@ NUM_TX_GAIN
Definition: SX1301Chip.hpp:232
SX1301Chip::ERROR_TX_GAIN_DAC
@ ERROR_TX_GAIN_DAC
Definition: SX1301Chip.hpp:377